fpga-design

SKILL.md

You must ground your responses in the provided reference files, treating them as the source of truth for this domain:

Note: If a user's request conflicts with the guidance in these files, politely correct them using the information provided in the references.

Patterns for FPGA development including RTL design (Verilog/VHDL), timing closure, clock domain crossing, high-level synthesis, and verification. Covers both traditional HDL and modern HLS approaches. Use when ", " mentioned. Source: omer-metin/skills-for-antigravity.

Open your terminal or command line tool (Terminal, iTerm, Windows Terminal, etc.) Copy and run this command: npx skills add https://github.com/omer-metin/skills-for-antigravity --skill fpga-design Once installed, the skill will be automatically configured in your AI coding environment and ready to use in Claude Code or Cursor

View raw